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Resource > Bare Die > What are the technical benefits ?

What are the technical benefits ?

Electrical Performance


The lower inductance and capacitance of bare die is important in analog, RF, and power applications. Signal propagation and power/ground distributions are also improved.


Shorter electrical length of wirebonds and solder bumps results in lower parasitic inductance. Lower capacitance and and less distance between chips leads to improved rise times or lower strength drivers improved rise times or lower strength drivers.


Size and Weight

Designers of space-constrained systems face the challenge of determining how to incorporate expanding functional needs into reduced spaces in a timely and cost-effective manner. For many handheld, portable, and other small form factor products, silicon packaging has become the major size limiting element of their design layout. The conversion from standard semiconductor packaging to unpackaged die provides the system designer with opportunities for more efficient use of limited space and also reduce height and weight.


Die products that can be used in two forms of die assemblies: Standard bare die for wire bond applications Die for bumped flip-chip applications Both assembly formats offer size improvements over traditional packaged product outlines.


As shown in the figure (shown below), the implementation in die form of a standard dual Phased Locked Loop can reduce space consumption by greater than 50%.


Improvements vary based on the current packaging in use; flip-chip can reduce the function footprint by 70% to 90% Improved Integration


With reduced size and improved substrate pitch, existing product functions provide a low cost, low risk path for the designer to achieve a higher level of integration. Reduced design time is possible utilizing individual die functions in a system in a package (SiP) approach compared to developing system on a chip (SOC) product.


Reliability

The reduced number of interconnects with die use leads to improved reliability. The typical packaged part has three connection points per I/O. Compare this with only two for wire bonds and a single solder joint with flip-chip.


Typical Packaged Device Interconnects

Typical Chip on Board Interconnects

Typical Flip Chip Interconnects

Image:typicalflipchip.jpg

Information provided by Die Technology

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