Ceramic Pin Grid Array Packages is a long established standard industry package. This through hole package consists of a co-fired ceramic base that has a matrix of pins brazed onto the bottom or top of the base. The lid for this package can be either ceramic "frit sealed" or metal "solder sealed". The package can be designed for either cavity up or cavity down configurations. This packaging technology allows application and design engineers to maximize the performance characteristics of semiconductors(silicon& GaAs).

CPGA is designed for low inductance, enhanced thermal operation, and capability. Higher Lead counts offer cavity down orientation for the potential application of a Heat Sink to assist in thermal dissipation. Minimum pin count is 28 while the maximum pin count is limited to the manufacturer's capabilities. We provide Lead counts from 28 up to 476.


  • Multilayer ground/power ceramic package
  • Footprint Compatible with PPGA
  • Rugged construction
  • Variety of Body Sizes
  • High I/O signal carrying capability
  • Heat plate/heat slug/heat sink
  • Hermetically encapsulated packages offering enhanced thermal dissipation